Abstract
Catalytic condensers offer a flexible platform for programmable catalysis by modulating the electronic properties of active sites through applied voltage. Constructed as metal-oxide-semiconductor (MOS) stacks, these devices feature a high-k dielectric separating two conductive films, with the top electrode serving as both a catalytic layer and charge distributor. Here, we enhanced the architecture of the catalytic condensers to improve charge distribution and localization. By reducing the hafnia dielectric thickness from 70 nm to sub-5 nm using an optimized Atomic Layer Deposition (ALD) process and integrating single-layer graphene as a charge distributor, we achieved a charge density of 4.6 x 10¹³ charges cm-2 without exceeding a leak current of 100 μA cm-2. Systematic ALD studies revealed that purge time affects the dielectric constant and resulting leak current, enabling the fabrication of a more electrically insulating and thin dielectric layer. These optimized condensers demonstrated leak currents as low as 1 nA cm-2 at 1.0 x 10¹³ charges cm-2. The ultrathin catalytic condensers were then used to explore several new geometries aimed at maximizing charge accumulation per platinum atom. The most effective design, the "blanket condenser," featured small platinum nanoislands at the interface of the top electrode and hafnia dielectric, covered by either single-layer graphene or porous carbon nanotubes. This configuration effectively blanketed the nanoislands, closing the electrical circuit while minimizing the distance between the dielectric and the active nanoislands. Compared to a continuous platinum electrode, the blanket condenser enabled accumulation of significantly more charge per platinum atom, opening new opportunities for catalytic applications.
Supplementary materials
Title
Ultrathin Catalytic Condensers with engineered Pt/HfO2 interfaces for charge modulation
Description
Supporting information for the main manuscript
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